Small chip big future! “Small chip” market size will reach 5.8 billion US dollars in the next five years

A chiplet is a method of manufacturing a system that is actually integrated by several smaller chiplets, but from the outside of its package it looks as if all the functional units are on a single chip. Chiplets are widely regarded by the industry as an important measure to keep the performance of the computing industry’s systems improving.

What is a “chiplet”?

Chiplets-based systems, simply put, future computer systems no longer require a variety of separate chips, such as CPU/GPU and various chip control units (MCUs). We only need one CPU chip (Chiplets) and several GPUs, and connect these GPUs to the Chiplets chips carried by the large silicon chip to form an integrated chip network.

Small chip big future! “Small chip” market size will reach 5.8 billion US dollars in the next five years

The concept of chiplets has actually existed for several years, and as advanced interconnect and packaging technologies mature, people pay more and more attention to it. Chiplets can be understood as specialized silicon blocks or IP blocks that have been optimized by design and manufacturing process, which allows them to be designed as small as possible, thereby increasing their yield and minimizing cost.

After all, 7nm process chips are already expensive, and it’s time to find a solution.

Continue Moore’s Law!The chiplet era is here

Fifty-five years ago, Moore’s Law, regarded as the “Bible” of the chip industry, predicted that when the price remains unchanged, the number of transistors that can be accommodated on an integrated circuit will double every 18-24 months, and the performance will also double. .

The emergence of Moore’s Law set an extremely critical benchmark for the pace of technological development, catalyzed the thriving technology market, and brought invaluable economic value to the entire IT industry.

The benefits of using advanced nodes are many, with greater transistor density, a smaller footprint, higher performance, and lower power, but the challenges are also getting harder to overcome.

At extremely small size, the physical bottleneck of chips is becoming more and more difficult to overcome. Especially in recent years, as advanced nodes move to 10nm, 7nm, and 5nm, the problem is no longer just a physical obstacle. The more nodes evolve, the higher the cost of scaling, and fewer design companies that can bear the economic burden.

Small chip big future! “Small chip” market size will reach 5.8 billion US dollars in the next five years

According to public reports, the design cost of the 28nm node is about 50 million US dollars, and by the 5nm node, the total design cost has soared to more than 500 million US dollars, which is equivalent to more than 3.5 billion yuan.

Keeping Moore’s Law is about maximizing profits. If R&D and production costs cannot be reduced, it will be a bad economic burden for both chip giants and startups.

Fortunately, whenever Moore’s Law is sung badly and will come to an end, scientists and engineers will always be inspired to innovate ideas, come up with breakthrough technologies that can turn the tide, and push Moore’s Law, which seems to be coming to an end, into the distance again and again.

The modular design based on small chips is a very key idea to solve the cost problem.

Three Values ​​of Small Chips: Fast Development, Low Cost, and Multiple Functions

The current chip design Model often purchases soft core IP or hard core IP from different IP suppliers, and then combines self-developed Modules to form a system-on-a-chip (SoC), and then produces chips at a certain manufacturing process node.

Through advanced packaging technology, chiplets can integrate a variety of different architectures, different process nodes, and even dedicated silicon blocks or IP blocks from different foundries. Super chip products in demand.

Compared to monolithic chips, the benefits brought by small chips are multiple.

First, chiplet development is faster.

In computing systems such as servers, power and performance are dominated by CPU cores and cache. By combining memory and I/O interfaces onto a single I/O chip, bottleneck delays between memory and I/O can be reduced, helping to improve performance.

Second, chiplets are less expensive to develop.

Because chiplets are composed of different chip modules, designers can choose the most advanced technology in certain parts of the design and use more mature, inexpensive technology in other parts, thereby saving overall costs.

For example, AMD’s second-generation EPYC server processor Ryzen adopts a small chip design, combining CPU modules manufactured by the more advanced TSMC 7nm process with I/O modules manufactured by the more mature GlobalFoundries 12/14nm process. 7nm can meet the The demand for high computing power, 12/14nm reduces the manufacturing cost.

The advantage of this is that the chip area of ​​the 7nm process is greatly reduced, and the use of I/O modules with more mature processes can help improve the overall yield and further reduce foundry costs. On the whole, the more CPU cores, the more obvious the cost advantage of the chiplet combination.

Small chip big future! “Small chip” market size will reach 5.8 billion US dollars in the next five years

Finally, small chips can be flexible to meet different functional requirements.

On the one hand, the small chip solution has good scalability. For example, after building a basic die, only one die may be used for laptops, two for desktops, and four for servers; on the other hand, chiplets can act as heterogeneous processors, combining GPU, Different processing elements such as security engines, AI accelerators, and IoT controllers can be combined in any number to provide richer acceleration options for various application needs.

As the advantages of chiplets are gradually revealed, they are being adopted by more advanced and highly integrated semiconductor devices such as microprocessors, SoCs, GPUs and programmable logic devices (PLDs).

Microprocessors are the largest market segment for chiplets, and the market share of microprocessors supporting chiplets is expected to grow from $452 million in 2018 to $2.4 billion in 2024, according to research firm statistics. At the same time, the computing field will become the main application market for chiplets, which is expected to account for 96% of total chiplet revenue this year.

market prediction

According to market research, “chiplets” are being adopted by more advanced and highly integrated semiconductor devices. For example, microprocessors (MPUs), system-on-chip (SOC) devices, graphics processing units (GPUs) and programmable logic devices (PLDs), especially MPUs are the most popular. Even counting the “chiplet” market, which relies on the MPU segment alone, could reach $2.4 billion by 2024.

The “chiplet” will be the most important factor in its $5.8 billion market in the next four years as an application processor with integrated graphics, security engine, artificial intelligence (AI) acceleration, low-power Internet of Things (IoT).

According to industry insiders, “everyone, from software developers to system designers to technology investors, has relied on the two-year timeline dictated by Moore’s Law for decades. With the advent of chiplets, the semiconductor business has And businesses that rely on chiplets now have an opportunity to get back to the usual pace of growth that delivers tremendous economic value to the entire tech industry.”

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