TSMC and Samsung provide chip supply chain data to the United States: What is the intention of the United States to extort data?

The U.S. Federal Register and related websites show that TSMC has completed the questionnaire provided by the U.S. government on November 5, U.S. time, and sent back three documents in total, including one public form and two non-public files containing trade secrets.

Today (November 8), Taiwan’s United Daily News and Taiwan Economic Daily reported that TSMC has responded to the US Department of Commerce’s previous request to collect information on the chip supply chain. The U.S. Federal Register and related websites show that TSMC has completed the questionnaire provided by the U.S. government on November 5, U.S. time, and sent back three documents in total, including one public form and two non-public files containing trade secrets.

TSMC spokesperson Nina Kao announced the relevant situation in an email on the 7th. In response to this “helping the US to solve the global chip shortage problem”, TSMC said that it is still committed to “protecting the confidentiality of customers as always”, and the information in its receipt does not involve customer-specific data.

According to the official announcement of the U.S. Department of Commerce to solicit opinions on the semiconductor supply chain, the solicitation of opinions will end on November 9, local time in the United States. As of the 7th, 23 major international manufacturers and institutions have completed their responses, including TSMC, UMC, ASE, Universal Crystal and other index manufacturers have submitted “answer sheets”, and some documents are even more “confidential”. South Korea’s Samsung and SK Hynix, the US semiconductor leader Intel, and the German giant Infineon have not responded as of the 8th.

TSMC handed over the “most detailed answer sheet”

The global chip shortage problem, which has continued to this day and is still far away, still shows no sign of easing, and is like a flood of beasts impacting one after another closely related industries…

According to previous related reports, in late September this year, the U.S. Department of Commerce required more than 20 chip-related companies, including TSMC, Samsung, Intel, etc. Commercially confidential inventory, orders, sales records, and other data.

The U.S. request has aroused the concern of large fabs including TSMC and Samsung, especially regarding the above-mentioned data involving trade secrets, including corporate inventories, backlogs, delivery times, procurement and production increases, and the main factors of each product. Customer Information.

In the face of doubts from the outside world, TSMC emphasized twice on September 30 and October 6 that they would not disclose sensitive customer information, but on October 22 and the following two days, TSMC staged a series of compromises. Then to the tough reversal, it first said that it would submit data on time, but then said that it would not provide confidential data in accordance with the requirements of the United States, and would not do anything that would harm the rights and interests of customers and shareholders.

It is reported that the survey by the US Department of Commerce is a questionnaire in the format of the established question and answer form. The part that chip supply chain manufacturers need to answer includes 11 questions and 1 comment. TSMC is in the 23 companies, institutions and individuals that have responded. The most explicit, including one public data and two confidential information.

In contrast, Western Digital, Micron, UMC and other companies also submitted data materials to the US Department of Commerce, but Micron submitted a confidential document; UMC Taiwan submitted a public data and a confidential document.

It is understood that the information disclosed by TSMC did not involve customer confidentiality, but disclosed the revenue of TSMC in recent years. TSMC said it expects revenue this year to reach a record high of US$56.6 billion (about NT$1.5 trillion), a year-on-year increase of 24.4%.

Involuntary use of “other tools”

It is understood that the US Department of Commerce’s collection of relevant chip information is very different from the previous “moderate” attitude of coordinating and urging companies to increase production. It can be said to be particularly tough, giving a total of 45 days of “voluntary” buffer time, but in view of these information The United States does not rule out the use of coercive measures because it is critical to address concerns about supply chain transparency.

South Korean semiconductor companies such as Samsung and SK Hynix are also in the same swing as TSMC. As early as the U.S. Department of Commerce’s investigation began, the South Korean ambassador to the United States made it clear that South Korean companies would not easily provide highly confidential information. At the same time, the South Korean government also conveyed the concerns of South Korean companies to the United States.

However, in the face of South Korea’s refusal, U.S. Commerce Secretary Gina Raimondo was asked at the Semiconductor Summit “what will happen if companies are unwilling to cooperate with the U.S. government in submitting data” and claimed: “If they don’t comply, our There are other tools in the toolbox that will allow them to provide data, and I hope we won’t get there, but if necessary, we will.”

The White House may invoke the National Defense Production Act or other laws to take coercive measures to make these semiconductor giants bow their heads. In the United States, then this is a form of data extortion.

However, in the face of the imminent deadline and the big stick of the United States, South Korean companies still succumbed after swinging from side to side for a month.

On November 3, South Korean company Samsung said it would submit business data to the United States on time. On November 7, South Korea’s Ministry of Finance said in a statement that in response to the US Treasury Department’s request for semiconductor companies to provide data on chip sales and inventory, South Korean technology companies are preparing to “voluntarily” submit some semiconductor data to the United States. At the same time, South Korean semiconductor companies have continued to consult with Washington on the extent to which information should be provided.

At present, Samsung and SK Hynix have not yet completed the return of the questionnaire, and it is rumored that they will reply within the last time, but they may also strive to submit a reply directly to the US Department of Commerce when South Korean officials visit the United States from the 9th to the 11th.

In addition, it has publicly and actively cooperated with the US semiconductor manufacturers Intel, Infineon, etc., and has not yet responded to the relevant questionnaires.

US ransoms data or has ulterior motives

The continuous global chip shortage has made countries around the world aware of the security of the local chip supply chain, especially for the United States, the former semiconductor hegemon, so the industry has interpreted the data of the US “blackmail” chip companies.

On the surface, the U.S. auto manufacturing industry has seen a significant reduction in production recently, and the economic recovery has fallen into a slump. According to the survey, automakers including GM and Ford have been reducing production capacity under the pressure of global chip shortages. U.S. dealerships sold fewer than 1 million new vehicles in August, down 72 percent from a year earlier. Gross domestic product grew just 2% in the third quarter of this year, the weakest pace in 11 months.

On the contrary, the global chip manufacturing industry continues to tilt towards Asia. Data show that in the foundry market, the world’s largest chip foundry company TSMC has a monopoly market share of 54%, and another Asian foundry giant Samsung has a market share of 18%. The share has dropped to 12%. Gina Raimondo even bluntly stated that in the world’s most advanced semiconductor production, the proportion of American manufacturing is zero.

On the other hand, from a technical point of view, Zhang Chao from the Taihe Think Tank Research Institute said that only from the perspective of chip manufacturing, there should be a gap of about ten years between American companies and TSMC and Samsung. Since the beginning of this year, Samsung has taken the lead in completing the trial production of the world’s first 3nm chip, while TSMC has officially announced that it has broken through 2nm chip technology and plans to mass-produce it in 2024. In contrast, American companies are still researching advanced 10nm and 7nm processes.

These undoubtedly make the United States look no longer safe.

Previously, US President Biden took out a semiconductor chip at a press conference and said, “Everyone knows the global chip market. The computer chip in my hand, many people present can’t even see it. It’s semiconductors. It’s coming in that American workers are now working significantly fewer hours, and it’s no exaggeration to say that this is the productivity of America in the 21st century!”

In order to suppress Japan, the United States took advantage of its international position to force Japan to sign the so-called “Semiconductor Agreement”, which stipulates that Japan’s minimum export price is limited. This move led to the rapid bankruptcy of the capital chain of many companies in the Japanese chip industry. The U.S. government took the opportunity to double its capital and used this “golden five years” to surpass Japan and seize most of the chip market in one fell swoop.

Now, does the United States have to rely on this kind of “hooliganism” to overtake the corner and achieve a semiconductor monopoly?

References:

1. “U.S. Collects Fab Information: TSMC Completed, Intel Not Submitted?”, Semiconductor Industry Watch

2. “U.S. Ransomware Chip Data” Hot Search! TSMC Confirms Submitting Three Dossiers, Weiken.com Electronic Engineering

3. “TSMC Filing: Chip Supply Information Provided to the U.S. Department of Commerce, but No Customer-Specific Data Disclosed”, Heart of the Machine

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Japan develops the world’s first adiabatic superconducting microchip “MANA”: energy consumption is greatly reduced

Superconducting microchips need to work in an ultra-low temperature environment. Although a large amount of energy is consumed to provide cooling and cooling for the chip, the overall energy consumption is greatly reduced compared with traditional chips.

A few days ago, researchers at Yokohama National University in Japan developed a microchip prototype “MANA” that applies superconductor devices. The chip has the characteristics of superconducting materials that have close to zero resistance in a low temperature environment, and its energy efficiency is 80 times that of top semiconductor devices in today’s high-performance computing chips.

The new invention, called the “Adiabatic Quantum Flux Parameterizer” (AQFP), assembles microchips that can achieve ultra-low power consumption while maintaining high performance, suitable for next-generation data centers and communication networks.

It is reported that the original intention of the team to develop superconductor microchips is to reduce the huge energy consumption caused by data operations.

According to Christopher Ayala, associate professor at Yokohama National University in Japan, “In the information age, digital communication infrastructure is crucial, and its energy consumption accounts for almost 10% of global electricity. The computing hardware in large data centers or the electronically driven equipment in communication networks, digital communication infrastructure will consume up to more than 50% of global electricity consumption by 2030.”

Such huge power consumption is not only unbearable for users, but also a huge burden on the environment.

In this regard, the research team said: “AQFP is a superconducting Electronic device, and only when the chip temperature is lowered to 4.2K (ie -268.95°C) can AQFP enter the superconducting state. However, even if the energy consumption of cooling is counted , AQFP is still 80 times more energy efficient than the top semiconductor devices in today’s high-performance computing chips.”

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Technology upgrade from CANopen to CANopen FD

On November 21, 2019, at the SPS 2019 exhibition celebrating the 30th anniversary, the CiA organization demonstrated the migration from classic CANopen to CANopen FD via a network connected by two bridges. So what changes does the emergence of CANopen FD bring? Here we focus on the characteristics of CANopen FD.

On November 21, 2019, at the SPS 2019 exhibition celebrating the 30th anniversary, the CiA organization demonstrated the migration from classic CANopen to CANopen FD via a network connected by two bridges. So what changes does the emergence of CANopen FD bring? Here we focus on the characteristics of CANopen FD.

Since the CAN 2.0 technical specification was promulgated in 1991, CiA has been committed to the promotion of the CAN protocol, including the design of the CAN bottom layer (CAN data link layer, CAN physical layer) and the CAN application layer (CANopen). The CANopen protocol clearly stipulates the specifications of its PDO, SDO, NMT network management and other protocols in CiA 301, and uses the classic CAN data link layer, while at the SPS exhibition CiA demonstrated the CANopen FD protocol specified in CiA 1301. Compared with CANopen using the classic CAN data link layer, the data segment provides an 8-byte payload. CANopen FD is based on CAN FD, and the data segment payload is increased to 64 bytes, which solves the problem of insufficient data segments in some applications. .

1. The same thing about upgrading the CANopen protocol to CANopen FD

1. NMT Network Management Protocol

The Network Management System (NMT) is responsible for starting the network and monitoring equipment. Engineers designed the CANopen FD network management system as a master/slave system. Only one active NMT master is allowed in the CANopen FD network. All CANopen FD devices have the NMT slave function, and are started, monitored, restarted by the NMT master, and assigned to a unique node ID.

In order to facilitate the management of devices, all devices have a built-in internal state machine, and transitions between states are triggered by internal events or externally from the host.

NMT slave state machine consists of initialization state, pre-operation state, operation state and stop state, and its state transition mode is shown in Figure 1.

Figure 1 Schematic diagram of NMT network management

NMT commands that control the state of the device are sent with the CAN identifier with the highest priority. Once a CANopen FD device receives an NMT command that controls the state of the device, it must make a transition. As shown in Figure 2, the NMT protocol maps to a single CAN FD data frame with a data length of two bytes. The first byte determines the command to be issued, the command specifier; the second byte specifies the node ID of the CANopen FD device.

Figure 2 Schematic diagram of NMT protocol

2. Error Control Protocol

In the CANopen FD network, it can be monitored whether the CANopen FD device is still in the network and in the expected NMT FSA state through the error control protocol (as shown in Figure 3, the start protocol, and the Figure 4 heartbeat protocol). CANopen FD device. All CANopen FD devices are based on the same CAN FD information and have the CAN-ID700H+ node ID of the CANopen FD device.

NOTE: CANopen FD does not support the CAN remote framework and therefore CANopen Node/Lifeguard.

Figure 3 Schematic diagram of the startup protocol

Figure 4 Schematic diagram of heartbeat protocol

3. Emergency Communication Object Protocol (EMCY)

When an error occurs inside the CANopen FD device, an EMCY is sent by the emergency error producer, which triggers an interrupt alarm. Each time an error event occurs, EMCY will only be sent once, and it will be broadcast to all devices that support the EMCY function, and then adjust for the error. When no new error occurs, no EMCY message will be sent as shown in Figure 5.

Figure 5 Schematic diagram of emergency communication object protocol EMCY

4. SYNC synchronization protocol

Same as CANopen, in CANopen FD devices, the SYNC synchronization protocol is sent periodically by the producer for network synchronization. All CANopenFD devices can act as SYNC producers. Typically, the SYNC protocol is used for bus load management. The SYNC message provides a 1-byte SYNC counter value. Each time a SYNC is sent, the corresponding counter is incremented by 1. At the same time, the transmission cycle of SYNC can be configured, the initial value of the counter is 1, and the maximum value can be configured in the data object synchronization counter overflow register (1019H), as shown in Figure 6.

Figure 6 Schematic diagram of SYNC synchronization protocol

5. Timestamp Protocol

The time stamp protocol allows the CANopen FD system to adjust to a unique network time. Sent by the CANopen FD master device to synchronize the internal clocks of all slaves. The timestamp is mapped to a single CAN frame of 6 bytes in length. As shown in Figure 7, by default, the CAN frame has the identifier 100h. This six-byte length of data provides “time” information, which is the number of milliseconds since midnight and the number of days since January 1, 1984.

Figure 7 Schematic diagram of timestamp protocol

2. Changes from CANopen to CANopen FD

1. USDO Agreement

USDO is used for configuration and diagnostic tasks in CANopen FD systems. However, process data can also be transferred via USDO services. USDO has the following characteristics:

l USDO service can confirm communication between single or multiple USDO servers;

l USDO clients can access all object dictionary entries in CANopen FD devices;

l USDO can provide read and write access to one or several sub-indexes in the USDO server object dictionary;

l USDO has routing function, which can realize data transmission on the boundary of CANopen FD network;

l USDO client and USDO server can be connected to different CAN physical layers;

l Data content of any length can be transmitted between the USDO client and the USDO server.

As shown in Figure 8, it is unicast and broadcast communication confirmed by USDO.

Figure 8 USDO unicast and broadcast communication

The USDO protocol “destination address” determines whether USDO communicates in a point-to-point connection or as a multiplex or broadcast. The command specifier determines the type of USDO transfer. The session ID is used as a transaction number, enabling clients to distinguish USDO accesses to the same USDO server. As in traditional CANopen SDO, indexes and sub-indexes identify data elements that are accessed in the USDO server’s object dictionary. In addition to classic SDO, USDO describes the data to be transferred by size and data type, which enables data recipients to perform consistency checks. As shown in Figure 9, in order to accelerate the USDO protocol transmission.

Figure 9 Speeding up USDO protocol transmission

For long data objects, such as data of type domain, which exceeds 7 bytes, the efficiency of accelerating USDO transmission is not very high. Similar to the CANopen protocol, in order to improve the efficiency of USDO transmission, the CANopen FD protocol introduces an extended USDO transmission method: block transmission. This USDO transmission method is more efficient and faster. The basic principle of this kind of block transfer is to divide the data into several single packets, and transmit these packets block by block in successive requests or responses. As shown in Figure 10, it is the USDO block transmission method.

Figure 10 USDO block transfer method

The USDO client informs the USDO server of the target index and sub-index as well as the expected data type and length. After the USDO server acknowledges its request, it gives the maximum block size (number of consecutive block messages) it can process. The USDO client will send each segment of the first block until the server confirms the end of reception.

2. PDO protocol

Process Data Objects (PDOs) are used in CANopen FD to broadcast high priority control and status information. A PDO consists of a CAN data frame and can communicate up to 64 bytes of data. However, the data length of CAN FD data frame is nonlinear from 8 bytes later. Therefore, when the PDO producer uses padding bytes to pad the PDO to the next supported CAN FD frame length, the consumer of the PDO may receive more data than expected. As shown in Figure 11.

Figure 11 Schematic diagram of PDO protocol

3. CANopen FD and Embedded Network, Industrial Internet of Things

Nowadays, the Industrial Internet of Things is gradually developing and rising, and slowly becoming mature. Embedded is also integrated into cloud application programs. In the era of big data, more data is needed for more accurate and secure algorithm analysis. The bottom layer of CANopen FD provides a payload of up to 64 bytes based on CAN FD, which can better meet the security performance requirements in the era of big data.

CANopen FD can better meet the development needs of the future industrial Internet, and the important reason is due to the emergence of the new USDO protocol. Due to the flexible nature of USDO, the CANopen FD/IOT gateway can easily access any data in the network, and can connect and access remote network CANopen FD devices through the routing function.

CANopen FD relieves developers of the burden of dealing with CAN hardware specific details, such as bit timing and acceptance filtering. CANopen FD provides a standardized communication object COB for configuration and network management data.

Four, CANFDSM-100 – serial port to CANFD conversion module

In practical applications, engineers often use serial ports to send and receive data or to debug. In this way, for the problem of CANopen FD equipment, we will need to implement serial port to CANFD to help us better realize data transmission and conversion. As shown in Figure 12, it is a serial port to CAN (FD) module CANFDSM-100 developed by Guangzhou Zhiyuan Electronics, with a built-in microprocessor. The module supports four modes: transparent conversion, transparent band identifier conversion, format conversion, and Modbus conversion. At the same time, the module integrates one CANFD interface and one UART interface. In CAN communication, it can be arbitrarily programmable between 40Kbps~1Mbps; in CANFD communication, it can be arbitrarily programmable between 1Mbps~5Mbps. Meet industrial-grade requirements, support online firmware upgrade, etc.

Figure 12 Schematic diagram of CANFDSM-100

Five, USBCANFD series CAN FD interface card

During the use of CANopen FD devices, data analysis or troubleshooting is often performed by grabbing the underlying CAN FD messages. As shown in Figure 13, it is a high-performance CANFD interface card developed by Guangzhou Zhiyuan Electronics Co., Ltd. It integrates 1-2 CANFD interfaces, and each interface has an independent 2500VDC electrical isolation protection circuit, so that the interface card can avoid damage due to ground circulation, enhance Reliability of the system for use in harsh environments. The PC is connected to the USBCANFD interface card through the USB2.0 port, so that it can send and receive data with the CAN (FD) network to form a CAN (FD)-bus control node.

Figure 13 Schematic diagram of USBCANFD-200U interface card

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The world’s top ten chip manufacturers revenue ranking in the first quarter: TSMC ranks first

The supply of semiconductor production capacity is not in demand, and the biggest beneficiary is naturally the fab.

A few days ago, TrendForce Research showed that, thanks to the increasing demand for various end applications and strong stocking of various components, the foundry capacity has been in short supply since 2020, and various manufacturers have increased their wafer prices and adjusted them. product mix to ensure profit levels.

The data shows that the total output value of the top ten wafer foundries in the first quarter of 2021 still exceeded a single-quarter record high again, reaching US$22.75 billion, a quarterly increase of 1%.

In terms of revenue ranking, TSMC’s revenue in the first quarter ranked first in the world with US$12.90 billion, a quarterly increase of 2%, and its share further increased to 55%.

The main revenue contribution came from 7nm, which continued to grow steadily with orders from AMD, MediaTek and Qualcomm, and revenue increased by 23% quarter-on-quarter.

16/12nm benefited from the strong demand for MediaTek’s 5G RF transceiver (radio frequency transceiver) and Bitmain mining machine chips, and revenue increased by nearly 10% quarter-on-quarter.

However, 5nm, which is most concerned by the market, has been affected by the entry of the largest customer Apple into the production off-season, and its revenue has declined.

Samsung’s revenue in the first quarter was US$4.11 billion, down 2% quarter-on-quarter, mainly because the Line S2 in Austin, Texas was hit by a snowstorm in February and was shut down due to power outages. Production was not fully resumed until early April, and film production was suspended for nearly a month. As a result, it became one of the few foundries to experience a revenue decline in the first quarter.

TrendForce believes that the foundry industry will still be in short supply in the second quarter, and the average selling price will continue to rise, which is expected to boost the revenue performance of major players in the second quarter.

The reason is that in the first half of the year, there was no obvious capacity expansion, and the driving force of various parts and components was still strong, and the capacity utilization rate of each factory was generally maintained at full capacity. And governments of various countries intervene in the production schedule of automotive chips, which may expand the production capacity crowding out effect.

To sum up, the total output value of the top ten foundries in the second quarter is expected to hit a new high again in a single quarter, with a quarterly increase of 1-3%.

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Palo Alto Networks medical IoT security solution to escort the security of medical equipment

Palo Alto Networks, a global leader in cybersecurity, today announced the launch of the most comprehensive medical Internet of Things (IoT) security solution. Palo Alto Networks IoT security solutions address Internet of Medical Things (IoMT) security challenges through machine learning-driven visibility, defense and enforcement, while providing in-depth analysis of specific medical devices and vulnerabilities. This helps improve data security and patient safety, while meeting the needs of IT teams and clinical engineering technology teams.

While IoT has opened doors for innovative services across industries, it has also created new cybersecurity risks. This is especially true in the medical field. According to a recent report by Unit 42, 83 percent of medical imaging devices run on unsupported operating systems, making them a potential target for attackers. Attacks on such medical devices could reduce the quality of care and allow attackers to steal patient data.

Palo Alto Networks IoT security solutions are designed to ensure that health care organizations (HDOs) can realize the benefits of IoT for patient care without sacrificing security. It is the only solution in the industry that uses machine learning and crowdsourced telemetry to quickly and accurately resolve all connected devices, even those never seen before. IoT security solutions also provide machine learning-driven policy recommendations to reduce manual work; intrusion prevention to block exploits; sandboxing to detect and defend against IoT malware; and URL and DNS security to block IoT over the web attack.

New medical IoT security features include:

MDS2 Document Extraction: The “Manufacturer Disclosure Statement on Medical Device Security” document allows medical device manufacturers to disclose the security-related features of their devices, allowing for deeper vulnerability analysis, tuning anomaly detection, and specific recommended strategies.

Operational Analytics: Provides biomedical and clinical engineering technology teams with a visual analysis of how, when, and where their connected medical devices are used, enabling teams to optimize resource allocation, improve patient care, make investment planning decisions, and reduce maintenance costs.

Expanded IoMT Discovery Capabilities: Along with numerous other medical-specific protocols, App-ID™ now provides expanded discovery and security capabilities for unique IoMT devices and medical applications.

Anand Oswal, Senior Vice President and General Manager, Firewall-as-Platform, Palo Alto Networks There are also significant risks. Our vision is to provide healthcare organizations with complete visibility, in-depth risk analysis and built-in defenses so they can get the most from this transformative technology, while reducing patient and risk to its data.”

Miroslav Belote, Chief Information Security Officer at Valley Health System, said, “Originally, the main goal of Valley Health System was to better understand and enable vulnerability management of medical devices connected to our network. As an initial step, we needed to identify these devices and understand How and where are they connected in the infrastructure. As we researched and looked at various products, we saw great potential and advantages in identifying biomedical, and all connected devices and systems. After months of comparing various systems , we chose the Palo Alto Networks IoT security solution. The solution is simple, cloud-delivered, and quick to deploy. Installation, configuration, and initial device discovery are straightforward. Within hours of turning on the system, We started to see results – inventory, classification, device and device risk profiles for thousands of devices. With Palo Alto Networks IoT security solutions, we gained complete visibility into over 4,000 non-traditional IT devices Visibility, about 30% more devices than we’ve seen before. We now plan to expand our inventory, vulnerability detection, defense processes and practices in our ongoing efforts to protect IT and IoT assets.”

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Low-latency QDR2RAM controller solution based on ALTERAFPGA

ALTERA company Bai Hailong Chen Wen

QDR2 RAM is a special structure of SRAM, its read and write ports are separate, there are two sets of read and write data bus. The address is shared by read and write. For the QDR2 RAM with a BURST length of 2, the read address is latched on the upper edge of the clock CK, and the write address is latched on the lower edge of the clock CK. Its structure eliminates the need for a turn-around of the data bus, resulting in lower latency.

In ALTERA’s high-end FPGA, we can use some low-level IP, such as DQDQS, DLL, PLL to implement a low-latency QDR2 RAM read-write controller, because of its simple structure and small read delay, it can meet customers’ needs in some data communication Product requirements, such as frame header access.

Figure 1 Structure diagram of the controller

Figure 2 Read latency is 7 clock cycles

FPGA implementation scheme

The structure of this controller is shown in Figure 1, including a DLL, a group of DQDQS, a PLL, command address output module, data input reception and synchronization module. PLL generates internal data clock and command clock, DLL and DQDQS are responsible for phase-shifting DQS, converting 36-bit double-edge input data into 72-bit single-edge parallel data, command address output module generates read and write addresses, read and write command signals, data input and receive And the synchronization module is responsible for synchronizing the data received by DQDQS to the internal data clock domain.

The internal user interface of this controller includes 21-bit read and write address input, 72-bit input data, 72-bit output data, single-bit read enable and write enable control, and single-bit read data valid signal. All of these signals are synchronized to the data clock domain of the PLL for user convenience. The QDR2 RAM interface is a standard form, 36bit output data, 36bit input data, a pair of DQS differential pairs, a pair of output clock CK differential pairs, and read and write control signals.

Table 1 FPGA resources consumed by the controller

FPGA Design Resources and Performance

The FPGA resources consumed by this controller are shown in Table 1 (implemented on an A2GZ device).

The read delay (from the rising edge of the read request signal qdr2_rps_en_n to the rising edge of the return data valid signal clt_rd_valid) is 7 clock cycles, as shown in Figure 2.

This design can be ported to all mid-to-high-end FPGAs of ALTERA, including A2GX, A2GZ, STRATIX3, STRATIX4, and STRATIX5, and has no impact on performance such as latency.

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Large copper clad laminate manufacturers have raised prices again: due to soaring raw material prices, tight supply

On November 9, Kingboard issued a price increase notice, stating that in view of the skyrocketing prices of CCL raw materials, glass cloth, resin “target=”_blank” > epoxy resin, etc., and the tight supply, the company’s CCL production costs continued to rise, The sales price of all materials will be adjusted from now on. The details are as follows:

On November 6, Shandong Jinbao also issued a price increase notice. The reasons for the price increase are almost the same: due to the recent rise in the prices of upstream raw materials such as Electronic copper foil, resin, and glass fiber cloth, the production cost of the company’s CCL products remains high. . Details are as follows:

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Opened 48 primary health care institutions for the elderly in 9 years, and Iora Health received another $126 million in Series F financing

Recently, Iora health, a primary care clinic operating company, announced that it has received US$126 million in Series F financing, led by Premji Invest (founded by the chairman of Wipro). This round of financing is mainly used to develop existing businesses, apply for EHR (Electronic Health Records System for Medical Insurance) certification, and add new features to its technology platform Chirp.

Iora Health said it plans to use the new funding to accelerate the company’s growth and add new features to its technology platform Chirp. It has also previously received funding from Flare Capital Partners, Temasek, F-Prime Capital, Cox Enterprises, Devonshire investors, 406 Ventures, Polaris Partners and Khosla Ventures, among others.

Iora Health is a service provider that provides primary healthcare for the elderly. Founded in 2011 and headquartered in Boston, it currently operates 48 clinics (up from 24 in 2018), focusing on providing collaborative care models for people over the age of 65. Support for Medicare patients.

IoraHealth said that under this Model, doctors will charge a fixed fee for each patient’s visit instead of charging for each service provided; in addition, patients have not been equipped with health coaches, and a self-developed software platform is provided for both parties to record and share. information. Overall, Iora Health has three innovations:

1) Adopt a non-traditional fee-for-service model, that is, do not accept self-paying patients, all from cooperative insurance and self-insured employers, to ensure unimpeded access to patients’ authorized needs and complete billing, and provide personalized care accordingly Program;

2) Effectively use new technologies such as big data, that is, use the electronic medical record system to grasp all the data of the patient, and reasonably classify and track the patient;

3) Nursing teams in diverse institutions, i.e. many health coaches in addition to hiring doctors, nurses and behavioral health specialists.

We know that elderly care and health care for the elderly are a major challenge on a global scale. In the United States alone, the elderly population in the United States exceeds 52.2 million, of which about 80% have at least one chronic disease. The traditional medical service model established for the treatment of acute diseases cannot meet the long-term needs of the elderly for primary health care; in addition, the high cost will also impose a huge burden on the health care system.

In China, similar problems are particularly prominent. Iora Health is constantly breaking the above-mentioned predicament through an innovative model, that is, starting with basic medical care services, operating according to the effect, paying attention to the health management of customers and reducing the probability of illness. With the successful fundraising of Iora Health, competition in the industry is heating up. Other companies are also keeping a close eye on health insurance, such as CVS, which recently hired Iora’s former chief marketing officer to lead clinic operations.

At present, many companies around the world have been involved in primary health care services for the elderly, such as , , . In terms of model, there are also benchmarking companies in China, such as Ping An Good Doctor, Penguin Almond, etc., but they are mainly aimed at the health management of the general public; in the field of elderly care, only a few players such as Taikang Pension have slightly different models.

However, with the deepening of the aging population, the advancement of primary medical care, and the development of long-term care insurance, China is also expected to have a primary medical care service platform similar to Iora Health.

The Links:   G084SN05 V7 NL6448BC26-15

The role of the motor winding dipping _ the method of dipping the motor winding

The role of motor winding dipping paint

1. Improve the heat resistance and thermal conductivity of winding insulation

Before dipping, the winding insulation gap is filled with air, and the thermal conductivity is poor. After dipping, the insulating paint fills all the voids of the winding insulation, and the thermal conductivity is greatly enhanced. After the paint film is formed on the dipped part, the contact with the air is reduced, the oxidation process is delayed, and the heat resistance is also improved.

2. Improve the electrical properties of winding insulation

After dipping, the winding turns, the gaps between the phases and the insulating layer and the interior of the insulating material are filled with insulating paint, which basically eliminates air bubbles and forms solid insulation with strong pressure resistance, thereby improving the electrical performance of the winding insulation. .

3. Improve the moisture resistance and chemical stability of winding insulation

Moisture and moisture can age and deteriorate the insulating material prior to dipping. After dipping, the insulating paint fills the capillaries and gaps of the insulating material, and forms a smooth paint film, which makes it difficult for moisture and moisture to penetrate, and dust and corrosive gases cannot directly contact the winding. And the winding insulation treated with special dipping paint also has the functions of anti-dew, anti-corona, anti-corrosion and anti-oil pollution.

4. Improve the mechanical strength of the winding

After dipping, each wire of the winding is bonded into a solid whole, which strengthens the mechanical strength of the winding and reduces the loosening and abrasion of insulation caused by electromagnetic force, vibration, thermal expansion and contraction.

  

1. Dipping

When repairing a single motor, the winding dip can be dipped. When pouring, place the stator vertically on the paint dripping tray, with one end of the winding facing upward, and use a paint pot or paint brush to paint the upper end of the winding. When the winding gap is filled with paint and begins to seep out from the other end of the gap, the stator is turned over and the other end of the winding is poured. until poured. This method can reduce the waste of insulating paint when repairing small motors sporadically.

2. Drip dip

This method is suitable for dipping treatment of small and medium-sized motors. Units lacking special equipment can use hand-painting process. The following introduces a common dripping process for dipping of small motor windings.

①Recipe. 6101 epoxy resin (mass ratio), tung oil maleic anhydride 50%, ready to use.

②Preheating. Power on and heat the winding for about 4 minutes, and control the temperature between 100 and 115 °C (measured with a spot thermometer), or place the winding in a drying oven and heat it for about 0.5 hours.

③ drip dipping. Place the stator of the motor vertically on the paint tray. When the temperature of the motor drops to 60-70°C, start to drip paint manually. After 10 minutes, turn the stator over and dip the other end of the winding until it is completely poured.

④ curing. After drip dipping, the winding is energized and cured, and the winding temperature is kept at 100-150 °C; the insulation resistance value is measured to be qualified (20MΩ), or the winding is heated in a drying furnace, the temperature is the same as above, and the time is about 2h (depending on the size of the motor), Released when the insulation resistance exceeds 1.5MΩ.

3. Rolling paint

This method is suitable for dipping of rotor or armature windings. When rolling paint, pour insulating paint into the paint tank, place the rotor in the paint tank, and the paint surface should submerge the rotor winding for more than 200mm. If the paint groove is too shallow and the rotor winding has a small area to be dipped in paint, the rotor should be rolled several times, or the rotor should be brushed while rolling. Usually rolling 3 to 5 times, the insulating paint can be soaked into the insulation.

4. Immersion

When repairing small and medium-sized motors in batches, the winding dipping paint can be immersed. When immersed, first put an appropriate amount of insulating paint into the paint can, and then hoist it into the motor stator, so that the paint liquid floods the stator for more than 200mm. After the lacquer liquid penetrates all the gaps between the winding and the insulating paper, the stator is lifted to drip the lacquer. When dipping paint, add 0.3~0.5MPa pressure. The effect is better.

5. Vacuum pressure dip

For high-voltage motors, as well as small and medium-sized motors that require high insulation quality, their windings can be dipped in vacuum pressure. When dipping paint, place the stator of the motor in a closed paint container, and use vacuum technology to remove moisture. After the winding is dipped in paint, a pressure of 200-700kPa is applied to the paint surface, so that the paint liquid penetrates into all the gaps of the winding and the depth of the capillary holes of the insulating paper to ensure the quality of the dipping paint.

After dipping the paint, place the stator on the wire mesh to make the paint drip clean, and wipe off the paint film on the surface of the stator iron core and the outer surface of the machine base with a cotton cloth dipped in gasoline, so as not to reduce the air gap and affect the assembly of the rotor.

After the winding is dipped and dried, the paint film in the inner cavity of the iron core cannot be removed with a wire brush. Otherwise, once the wire on the wire brush is broken, a small piece of wire head may fall on the notch of the iron core, especially when the wire brush is inserted into the edge of the slot wedge, if any broken wire remains, even with compressed air It can’t be blown off, and when the motor is running, the residual wire ends can scratch the rotor. Therefore, it is forbidden to use a wire brush to remove the paint film of the inner cavity of the iron core.

The Links:   ESM4016 2MBI150UM-120-50

2021 1-6 operation of China’s integrated circuit industry

2021 1-6 operation of China’s integrated circuit industry

Under the circumstance that the global semiconductor products are in short supply, the global semiconductor market will continue to maintain rapid growth from January to June 2021. According to data released by the Semiconductor Industry Association (SIA), the global semiconductor market sales from January to June 2021 reached US$253.1 billion, a year-on-year increase of 21.4%. Data in June 2021 shows that the semiconductor market in various regions and countries around the world maintains rapid growth. Among them, Europe increased by 43.2% year-on-year, China increased by 28.3% year-on-year, America increased by 22.9% year-on-year, and Japan increased by 21.2% year-on-year.

Affected by the strong global demand for semiconductor products, China’s integrated circuit industry continues to maintain a steady growth trend. According to statistics from the China Semiconductor Industry Association, from January to June 2021, the sales of China’s integrated circuit industry was 410.29 billion yuan, a year-on-year increase of 15.9%, and the growth rate was slightly lower than that in the first quarter. Among them, the design industry increased by 18.5% year-on-year, with sales of 176.64 billion yuan; the manufacturing industry increased by 21.3% year-on-year, with sales of 117.18 billion yuan; the packaging and testing industry increased by 7.6% year-on-year, with sales of 116.47 billion yuan.

According to customs statistics, from January to June 2021, China imported 312.33 billion integrated circuits, a year-on-year increase of 29%; the import value was 197.88 billion US dollars, a year-on-year increase of 28.3%. The export of integrated circuits was 151.39 billion pieces, a year-on-year increase of 39.2%; the export value was 66.36 billion US dollars, a year-on-year increase of 32%.

The Links:   LQ64D343 MG400Q1US41

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